iot-forge
OrganizationClaude Code skills for M5Stack firmware development — board pinouts, peripherals, and ESP32 chip capability references
Categories
Indexed Skills (9)
m5stack-cardputer-adv
Hardware reference and development helper for the M5Stack Cardputer Adv (also written Cardputer-ADV, product code K132-Adv) — a pocket ESP32-S3 computer with a 56-key keyboard, 1.14" screen, BMI270 IMU, and ES8311 audio codec. Use this skill whenever the user is writing, debugging, or planning firmware for a Cardputer Adv, or asks about its pinout, keyboard (TCA8418), IMU (BMI270), audio codec (ES8311), display (ST7789V2), Grove/EXT ports, battery behavior, or how to set it up in Arduino IDE, PlatformIO, UIFlow2, or ESP-IDF. Also trigger on the plain "Cardputer" name if context (TCA8418, BMI270, ES8311, or "Adv"/"ADV") makes clear it's the Adv variant rather than the original Cardputer, since the two boards differ in keyboard and audio hardware and are easy to mix up.
m5stack-core2
Hardware reference and development helper for the M5Stack Core2 family — a 2.0" touchscreen ESP32 (classic, Xtensa LX6) Controller built around an AXP192 power management IC, ILI9342C display, FT6336U capacitive touch, BM8563 RTC, and (on original/1.1/1.3 revisions) an MPU6886 or BMI270 IMU. Covers the plain Core2 (v1.0/v1.1, v1.3) and the Core2 For AWS variants (For AWS, For AWS v1.3), which add an ATECC608B hardware crypto chip for AWS IoT device authentication, a 10-LED SK6812 RGB ring, and a larger antenna. Use this skill whenever the user is writing, debugging, or planning firmware for any Core2 board, or asks about its pinout, power management (AXP192 — battery, vibration motor, LED, DCDC rails), display/touch, RTC, audio (NS4168/SPM1423), IMU, the ATECC608 secure element and AWS IoT provisioning, or how to set it up in Arduino IDE, PlatformIO, ESP-IDF, or UIFlow1/2. Also trigger on "Core2", "Core2 For AWS", "AWS IoT EduKit", "AWS IoT Kit v1.3", "K010-AWS", "Core2-for-AWS-IoT-EduKit", or "M5Core2" in an
m5stack-tab5
Hardware reference and development helper for the M5Stack Tab5 (product code C145) — an ESP32-P4-based 5" touchscreen IoT/industrial terminal with an ESP32-C6 wireless co-processor, MIPI-DSI display, MIPI-CSI camera, ES8388 audio codec, BMI270 IMU, RX8130CE RTC, RS485, and a removable NP-F550 battery. Use this skill whenever the user is writing, debugging, or planning firmware for a Tab5, or asks about its pinout, display/touch (GT911/ILI9881C or ST7123/ST7121), camera (SC2356), audio (ES8388/ES7210), IMU, RTC, power management (IP2326/INA226/IO expanders), RS485, Grove/M5-Bus/GPIO_EXT ports, or how to set it up in Arduino IDE, PlatformIO, UIFlow2, or ESP-IDF. Also trigger on "M5Tab5" or the bare word "Tab5" in an M5Stack/ESP32-P4 context.
esp32-c6
Chip-level ESP-IDF capability reference for the ESP32-C6 SoC (single-core RISC-V HP core + RISC-V LP core, WiFi 6 + BLE 5.3 + Thread/Zigbee) — what the chip can do, distinct from any board's wiring. Use when a user wants to exploit ESP32-C6 hardware — WiFi 6/BLE/802.15.4 radio coexistence (Thread Border Router, Zigbee gateway, Matter endpoints, why it's time-division not simultaneous), the LP core (a real always-available RISC-V coprocessor, not a restricted ULP-FSM), RMT/LEDC/I2S/ADC/PCNT/MCPWM/dual-TWAI peripherals, SD-SPI-only storage (no SDMMC host, no eMMC), deep sleep/wake sources, and why there's no PSRAM and no native USB OTG on this chip. Trigger on "how do I use WiFi 6/Thread/Zigbee/LP core/deep sleep on an ESP32-C6", radio-coexistence or Matter/Thread/Zigbee questions, or any M5Stack C6 board (NanoC6, Stamp C6LoRa, Tab5's C6 radio co-processor, Stamp-P4's AddOn C6) needing depth beyond its own SKILL.md. For pinouts/wiring use that board's skill — this is the shared chip layer it points into.
esp32-p4
Chip-level ESP-IDF capability reference for the ESP32-P4 SoC (dual-core RISC-V HP cores + a RISC-V LP core) — what the chip can do, distinct from any board's wiring. Use when a user wants to exploit ESP32-P4 hardware — MIPI-CSI/DSI with the on-chip ISP, hardware JPEG encode/decode, hardware H.264 encode, PPA/2D-DMA image acceleration, the LP core and its own peripherals, USB HS OTG vs FS OTG vs USB-Serial-JTAG, TWAI/CAN, Ethernet MAC, SDIO host, in-package PSRAM up to 32MB, HP-core task pinning, and the PIE instruction extensions behind on-device AI/DSP. Trigger on MIPI-CSI/MIPI-DSI/camera/ISP/JPEG/H.264/PPA/LP-core/deep-sleep/PSRAM/USB-HS-OTG questions on an ESP32-P4, or any M5Stack P4 board (Tab5, Stamp-P4) needing depth beyond its own SKILL.md. For pinouts/wiring use that board's skill. Also relevant when a user asks why their ESP32-P4 board has no WiFi/Bluetooth and needs a companion radio chip.
esp32-s3
Chip-level ESP-IDF capability reference for the ESP32-S3 SoC (Xtensa LX7 dual-core) — what the chip can do, distinct from any board's wiring. Use when a user wants to go beyond basic Arduino sketches and exploit ESP32-S3 hardware — RMT (IR/WS2812/custom protocols), LEDC (PWM), I2S (audio), ADC/touch sensing, PCNT (encoders), MCPWM (motor control), TWAI/CAN, SDMMC/SD-SPI, native USB OTG vs the USB-Serial-JTAG controller, sleep modes and wake sources, ULP-FSM/ULP-RISC-V coprocessors, octal/quad PSRAM config, dual-core FreeRTOS task pinning and IRAM/ISR placement, WiFi/BLE coexistence, and the SIMD instructions behind esp-dsp/ESP-DL/TFLite Micro. Trigger on "how do I use RMT/LEDC/I2S/ULP/deep sleep/dual core/PSRAM/USB OTG on an ESP32-S3", low-power/performance-tuned S3 firmware questions, or any M5Stack S3 board (Cardputer, Cardputer Adv, AtomS3, AtomS3R, CoreS3, StickS3, Stamp-S3) needing depth beyond its own SKILL.md. For pinouts/wiring use that board's skill — this is the shared chip layer it points into.
esp32
Chip-level ESP-IDF capability reference for the classic ESP32 SoC (dual-core Xtensa LX6) — what the chip can do, distinct from board wiring. Covers the ESP32-D0WDQ6-V3 / ESP32-D0WD-V3 / ESP32-D0WDR2-V3 die family used in ESP32-WROOM-32 and ESP32-WROVER modules. Use for RMT (IR/WS2812), LEDC (PWM), I2S (audio/parallel camera), ADC/DAC/touch (incl. ADC2-vs-WiFi conflict), PCNT, MCPWM, TWAI/CAN, SDMMC host + SDIO slave, the deprecated Hall sensor, ULP-FSM, deep sleep/hibernation, dual-core task pinning, WiFi/Bluetooth Classic+BLE coexistence, and what "V3" silicon changed vs older revisions. Trigger on RMT/LEDC/I2S/ULP/deep-sleep/ADC2 questions on a classic ESP32, D0WDQ6/D0WD/D0WDR2/WROOM/WROVER, or any M5Stack classic-ESP32 board (Core2, Basic, Fire, Tough, StickC-Plus, Atom-Lite/Matrix, Stamp-Pico, CoreInk, Paper) needing depth beyond its own SKILL.md. For pinouts/wiring use that board's skill — this is the shared chip layer it points into.
new-device-skill
Build or update an M5Stack hardware skill in this marketplace — a Controller (a board that runs firmware, like Core2 or AtomS3), a Unit (a peripheral you drive from a Controller, like a ToF sensor or a relay), or a Chip (an Espressif SoC capability layer, like esp32-c6). Use whenever adding a new board/unit/chip to this repo, correcting an existing skill, deciding whether something warrants its own skill versus a section in an existing one, or figuring out where a piece of content belongs (board wiring vs. chip capability). Covers the research workflow, naming and file-layout conventions, the Controller-to-Chip pointer convention, how to flag unverified sourcing, and the release steps (catalog row, version bump, validation) that make the work actually reach users.
m5stack-cap-lora-1262
Hardware reference and firmware helper for the M5Stack Cap LoRa-1262 (SKU U214) — a snap-on cap for the Cardputer Adv (K132-Adv) and CardputerZero that carries a Semtech SX1262 sub-GHz LoRa radio (868–923 MHz, +22 dBm TX, external RP-SMA antenna) and an ATGM336H-6N GNSS receiver (GPS/QZSS/BeiDou/Galileo/GLONASS, UART @ 115200 8N1). Use whenever a user is writing, debugging, or wiring firmware for the Cap LoRa-1262 — LoRa TX/RX with RadioLib, GNSS parsing with TinyGPSPlus, SPI/GPIO/UART pin mapping on Cardputer Adv, the PI4IOE5V6408 I/O expander's RF antenna-switch enable, or the shared-SPI-bus overlap with the Cardputer Adv microSD slot. Also trigger on "Cap LoRa 1262", "LoRa GPS Cap", "U214", "SX1262 cap", or M5Stack Cardputer LoRa/GNSS accessory questions where context implies this specific cap.
Bio shown is the top-scored skill's repo description as a fallback — real GitHub bios land in a future update.