assembly-arm

# ARM and AArch64 assembly AArch64 has 31 general 64-bit registers, a clean load-store instruction set, and per-core SIMD through NEON. This skill reads compiler output and writes correct inline asm for it. ## Contract | Field | Bound contract | |---|---| | Trigger | The task reads GCC or Clang AArch64 output, writes inline asm or standalone assembly, decodes AAPCS64 register roles, or writes NEON intrinsics or SVE kernels. | | Authority | Read-only. The skill explains, drafts, and annotates assembly; edits land in the user's source through the normal coding path. No remote mutation. | | Side effect | None. Output is analysis and drafted code in chat. | | Done | The drafted assembly assembles for the named target, or the compiler output under discussion is explained register by register. | ## Inputs - The C or C++ source, compiler output, or assembly fragment: required. - The target: required. `aarch64-linux-gnu` for application cores, `arm-none-eabi` with `-mthumb` for 32-bit Cortex-M. - The purpose: required. Reading output, writing inline asm, or vectorizing. ## Procedure 1. Generate a baseline. Write the C version first and read its output before hand-writing anything. Done when: the compiler's own code for the same function is on screen. ```bash aarch64-linux-gnu-gcc -O2 -S foo.c -o foo.s aarch64-linux-gnu-objdump -d a.out ``` 2. Map registers by role. The table names are the ABI's, and assembly must respect them. Done when: every register in the fragment is cla...