tipoLi5890

akcli-altium-interop

Work with Altium Designer through the zero-dependency `akcli` CLI: parse Altium .SchDoc/.SchLib/.PcbDoc files without an Altium install, export normalized JSON and Protel/KiCad/CSV netlists, deliver schematic edits back into Altium (offline human draw instructions + importable netlist, or the optional Windows Altium 22+ live bridge), and migrate Altium designs to KiCad with netlist-diff verification. Use this skill whenever the task involves: reading, exporting, or converting an Altium file; getting a design out of Altium into another tool; getting changes into an Altium schematic; an Altium-to-KiCad migration or equivalence check; or the Altium live bridge. Triggers on keywords: Altium, Altium Designer, SchDoc, SchLib, PcbDoc, Protel netlist, OLE2/CFBF, Altium export, Altium import, migrate to KiCad, AD to KiCad, live bridge, DelphiScript, X2.EXE.

Code & Development Listed

akcli-circuit-debug

Systematically diagnose misbehaving schematics and `akcli` tool failures — no Altium or KiCad install required. Use this skill whenever the task involves: debugging net connectivity (a net that is split, merged wrongly, missing, or a pin that floats when it should not); triaging `akcli check` findings (real fault vs false positive, deciding whether a clean pass is trustworthy); investigating why `akcli plan`/`akcli draw` refused to write or what an exit code means; recovering from a failed apply (backup/rollback); or classifying parse failures and unsupported-input refusals before reporting a bug upstream. Triggers on keywords: debug, diagnose, troubleshoot, net split, floating pin, wrong net merge, false positive, ERC finding, exit code, parse error, refused, dangling endpoint, connectivity gate, rollback, backup, corrupt SchDoc, unsupported format.

Web & Frontend Listed

akcli-circuit-design

Read, analyze, diff, and draw electronic schematics with the zero-dependency `akcli` CLI (akcli) — no Altium or KiCad install required. Use this skill whenever the task involves: reading or parsing an Altium .SchDoc/.SchLib/.PcbDoc or a KiCad .kicad_sch/.kicad_sym/.kicad_pcb; extracting a netlist; running ERC, power-rail, BOM, or a design review on a schematic; producing a pin map / pinout / MCU pin->net table; diffing two schematic revisions (v1 vs v2); drawing or editing a KiCad schematic from an op-list; or working with JLC/LCSC/EDA parts, footprints, and connectivity. Triggers on keywords: SchDoc, kicad_sch, schematic, netlist, ERC, electrical rule check, design review, power rails, pinmap, pinout, schematic diff, draw KiCad, op-list.

akcli-datasheet-facts

Extract audited, PDF-pinned component facts into the akcli datasheet facts store (`akcli review facts`) so review findings upgrade from heuristic to datasheet_backed. Use this skill whenever the task involves: reading a component datasheet to record its Vref / crystal load capacitance / absolute maximum / thermal numbers; building or verifying `datasheets/extracted/` facts files; upgrading `akcli review analyze` findings to datasheet_backed; or checking why a finding says "verify against the datasheet". Triggers on: datasheet facts, facts store, extract datasheet, Vref, load capacitance, absolute maximum, theta_ja, 資料表, 元件參數擷取, datasheet_backed, review facts.

akcli-deep-review

Generate LLM design-review candidates and gate them through `akcli review validate` — the agent-proposes / akcli-verifies contract. Use this skill whenever the task involves: a deep or exhaustive design review beyond the deterministic detectors; producing review observations from reading datasheets or design intent; running `review validate` on candidate findings; or presenting accepted vs quarantined LLM findings honestly. Triggers on: deep review, LLM review, candidate findings, review validate, quarantine, 深度審查, design intent review, second-opinion review, exhaustive review.

Web & Frontend Listed

akcli-design-calc

Offline engineering calculators for electronics design via `akcli calc` — E-series (IEC 60063) value snapping and resistor combinations, voltage dividers, LM317/FB regulator networks, IPC-2221 track width and clearance, via parasitics, fusing current, AWG, microstrip/stripline impedance, RF attenuators, buck/boost power stages, NE555, op-amp gain pairs, I2C pull-ups, crystal load caps, junction thermal, battery life, LDO headroom, comparator hysteresis, envelope detectors, resistor color/SMD/EIA-96 codes, galvanic compatibility. Use whenever a design task needs a computed component value or a standards-backed physical check. Triggers on: resistor value, E24/E96, divider, LDO feedback, dropout, trace width, current capacity, clearance, creepage, via, impedance, attenuator, 555, pull-up, load capacitance, heatsink, hysteresis, envelope detector, battery runtime, color code, SMD marking.

akcli-jlcpcb-capabilities

Consult 嘉立創/JLC (jlc.com) manufacturing capabilities — the PRIMARY reference — while designing a board: rigid PCB (1-64 layers, HDI blind/buried vias, 0.1 mm microvias, up to 6 oz copper), FPC, and SMT assembly limits with exact numbers, plus a JLCPCB-international (jlcpcb.com) difference table and stencil specs. Use this skill whenever the task involves: choosing trace width/spacing, via or drill sizes, board size/thickness, copper weight, solder mask or silkscreen limits; checking whether a package (0201/0402, BGA pitch, fine-pitch IC) is assemblable; Economic vs Standard SMT; panelization (V-cut, 郵票孔, process borders, Mark points); flex stackups, coverlay, stiffeners; stencil ordering; or preparing / exporting Gerber+drill files for a JLC order (出圖, RS-274-X, layer mapping, plated vs non-plated holes, silkscreen-on-pads, the common DFM mistakes JLC flags). Triggers on: 嘉立創, JLC, JLCPCB, 工藝能力, 製程能力, DFM, design rules, min trace, 線寬線距, annular ring, 孔環, via, 過孔, 盲埋孔, HDI, 微孔, drill, 鑽孔, board thickness, 板厚,

akcli-parts-sourcing

Source real, orderable parts for a schematic with the `akcli jlc` command family — search the JLCPCB/LCSC catalog, check stock/price/Basic-vs-Extended status, convert a chosen part into a KiCad symbol/footprint/3D library (in-process, vendored MIT JLC2KiCadLib core), resolve and download the part's datasheet PDF (`jlc datasheet`), verify the design against it, and close the BOM-hygiene loop with `akcli check --bom`. Use this skill whenever the task involves: finding a part by MPN, value, or package; looking up an LCSC C-number; checking JLCPCB stock or price tiers; choosing between Basic and Extended parts; recording sourced parts on a schematic; fetching or reading a component datasheet / spec sheet ("找規格書", "datasheet", "電氣特性"); or filling in missing BOM values and footprints. Triggers on keywords: JLCPCB, LCSC, C-number, jlcsearch, EasyEDA, BOM, bill of materials, part search, sourcing, stock, price, Basic part, Extended part, datasheet, spec sheet, 規格書.

akcli-release-gating

Gate a hardware release with `akcli release preflight` — every gate, a traceable manifest, and the governance for letting review findings block (calibrated allowlist policy). Use this skill whenever the task involves: releasing/ordering/taping out a board; running or interpreting release preflight; authoring a `--review-policy` allowlist; checking a fab (gerber) package before ordering; or deciding whether a finding may block CI. Triggers on: release, preflight, tape-out, order the board, 放行, 出貨, 下單, fab package, gerber check, release manifest, review policy, blocking gate, allowlist.

API & Backend Listed

akcli-schematic-authoring

Create a NEW KiCad schematic from written requirements — or surgically extend an existing sheet — by authoring an `akcli` op-list and driving the plan -> dry-run -> apply -> verify loop. Use this skill whenever the task involves: designing a circuit from a spec or datasheet ("設計電路", "design a circuit", "create a schematic from scratch"); placing components, wires, net labels, power ports, or junctions in a .kicad_sch via op-list JSON; picking real parts with JLC/LCSC sourcing before drawing; or safely re-running / editing a previously drawn sheet. Triggers on keywords: new schematic, draw circuit, op-list, place_component, add_wire, net label, power port, decoupling, LDO block, connector fanout, akcli plan, akcli draw, JLC part selection, kicad_sch authoring.

akcli-schematic-review

Run a structured, severity-ranked design review (審查) of an Altium .SchDoc or KiCad .kicad_sch schematic using the `akcli` CLI. Use this skill whenever the task involves: reviewing a schematic before release, prototype, or tape-out; auditing ERC, power-rail, or BOM check results; spot-checking a netlist against datasheet pin functions; cross-checking an MCU pinmap against an expected pin table (CSV/JSON/DTS-derived); reviewing what changed between two schematic revisions and whether anything regressed; running the `akcli review` engine (signal/validation/PCB/EMC/gerber detectors) and interpreting its confidence-graded findings, trust summary, and EMC risk score; or writing a hardware review report with Blocker/Major/Minor/Info/Question findings. Triggers on keywords: design review, schematic review, circuit review, 審查, hardware review, ERC audit, power tree, decoupling, pull-up, strap pin, boot pin, floating input, connector pinout, netlist check, pinmap cross-check, revision diff, regression, review report, s

akcli-setup

Verify and repair the akcli environment before (or when) anything misbehaves — run `akcli doctor` to probe Python, the akcli install, packaged schemas, kicad-cli, libngspice, config discovery and (opt-in) jlc network reachability, then apply the per-OS remediation for whatever is missing. Use this skill when: setting up akcli on a new machine or CI runner; a command fails with KICAD_CLI_MISSING, NGSPICE_MISSING, exit 7, "command not found", or import errors; `akcli sim` cannot find an engine; `jlc` cannot reach the network; or the user asks to "check the environment" / "安裝" / "環境檢查" / "設定 akcli". Triggers on keywords: setup, install, doctor, environment, kicad not found, ngspice missing, KICAD_CLI, AKCLI_NGSPICE, PATH, pipx, PEP 668.