memory-modellisted

# Memory Model ## Purpose Use this skill to select and review memory orderings in Rust. It gives you the happens-before rules, a decision table for each ordering, the standard atomic patterns, and the checks that prove the code is correct. The default assumption in this skill is a **weakly ordered target** (ARM64, POWER, RISC-V). On these targets the hardware reorders memory accesses unless you request a barrier. Code that passes on x86 can fail on ARM64. ## When to use - You must pick an ordering for a new atomic operation. - You review a diff that adds `AtomicBool`, `AtomicU64`, `AtomicUsize`, or a CAS loop. - You must explain the difference between acquire-release and sequential consistency. - A concurrency bug reproduces on an ARM64 device but not on an x86 developer machine. - You must decide if `Relaxed` is safe for a counter or for a stop flag. ## Core rules Apply these five rules before you write any atomic code. 1. **Use the weakest ordering that is correct.** Do not start from `SeqCst`. Start from the data dependency, then select the ordering that publishes it. 2. **Ordering is a property of a pair, not of one operation.** A `Release` store is useless without a matching `Acquire` load of the same atomic. 3. **Atomics order the *other* data around them.** If the atomic carries no dependent data, `Relaxed` is usually enough. 4. **Do not use atomics to guard non-atomic data directly.** Use `Mutex`, `RwLock`, or an ownership transfer. Use the atomic