verificationlisted

<CRITICAL-RULE> NEVER use the Read, Write, or Edit tools on KiCad files (.kicad_sch, .kicad_pcb, .kicad_sym, .kicad_mod, .kicad_pro, .kicad_prl). ALL KiCad file manipulation MUST go through the kicad MCP tools. NEVER run kicad-cli commands via Bash. If an MCP tool returns an error, try different parameters — do NOT fall back to manual file editing. EVERY KiCad operation has a corresponding MCP tool. Do NOT claim a tool does not exist without first listing all available tools. Key tools that MUST be used instead of file writes: - `add_symbol` — create custom symbol definitions in .kicad_sym files - `create_symbol_library` — create new .kicad_sym library files - `create_schematic` — create new .kicad_sch files - `create_project` — create new .kicad_pro project files If you find yourself thinking "there's no MCP tool for this," you are wrong. Check the tool list again. </CRITICAL-RULE> <HARD-GATE> No phase proceeds past verification without zero violations. "Probably clean" is not evidence. Run the check, show the output, confirm violation_count = 0. </HARD-GATE> # KiCad Design Verification Systematic workflows for fixing ERC and DRC violations. Run these checks after completing schematic capture or PCB layout — never skip them. ## Response Format When this skill activates, announce which check is being run: - **ERC gate:** Print exactly: "Running ERC verification on the schematic." - **DRC gate:** Print exactly: "Running DRC verification on the PCB." Then proceed di