soc-integrationlisted

# SoC Integration ## Overview An SoC is a CPU, a bus fabric, and a set of peripherals connected by an address map. The integration job is to make that map the single source of truth and derive everything else (RTL wiring, device trees, ACPI, docs, firmware headers) from it. **Core principle:** Describe the SoC once in a neutral structure. Every output is a consumer of that structure, never a producer of its own truth. The day a device tree and the RTL disagree about a base address is the day you debug ghosts. ## When to Use - Wiring peripherals onto a bus and assigning an address map - Generating a DTS/DTB, ACPI tables, a memory map doc, or firmware register headers - Two generated artifacts disagree (the kernel's device tree says one base address, the RTL another) - A generator reaches into a CPU/peripheral's internals to dig out wiring details Skip for a single fixed-function block with no bus and no software-visible map. ## Peripherals Are Modules, Not Plugins Model each peripheral as a first-class hardware module that exposes its bus interface, its register block, and its metadata (compatible string, interrupt number, address size). Because it is a real module, you can elaborate it, test it, and read its metadata to generate a device tree node. Avoid a "plugin" that is just a config blob with no hardware behind it. If the device tree generator and the RTL both have to know a peripheral exists, they should learn it from the same module, not from two parallel lists